A. 특 징 (Features) 
  Versatile Computer Controlled Ultrasonic System.
  High Power Gated RF Amplifier.
  Superheterodyne Receiver.
  Quadrature Phase Sensitive Detection and Analog Integration.

  
B. 규 격 (Specifications)
 Frequency Range for the System  50 kHz to 20 MHz
 Frequency Range for Synthesizer No. 1  40 kHz to 32 MHz
 Frequency Range for Synthesizer No. 1  0 Hz to 32 MHz
 Nominal Frequency Range for Gated Amplifier No 1  50 kHz to 30 MHz
 Nominal Frequency Range for Gated Amplifier No 2  50 kHz to 30 MHz
 Nominal Output Impedance of Gated Amplifiers  50 Ohms
 Output Level Control  >I40 dB
 Gated Amplifier RMS Output Power (into 50 Ohms)  5 kW from 0.5 to 5 MHz
  falls to l kW at 50 kHz at low freq. end;
  falls to 200 W at 20 MHz at high freq. end
 Maximum Pulse Width  200 microseconds (hardware limitation)
 Maximum Duty Cycle  0.3 %
 Overload Provisions  Output shuts down if duty cycle limit is exceeded
 Intermediate Frequency (IF) of Superheterodyne Receiver  20 MHz
 IF Bandwidth Filter  0.1, l, and 4 MHz
 Nominal Frequency Range for Receiver  40 kHz to 80 MHz
 Frequency Range for Receiver Synthesizer (Synth. No. 3)  20.04 MHz to 64 MHz
 Receiver Gain  22 dB to 100 dB in 2 dB steps
 Receiver High Pass Filter  0.04, I, and 4 MHz
 Receiver Low Pass Filter  20, 40, and 80 MHz
 Multiplexed Receiver lnputs  2
 Receiver lnput lmpedance  50 Ohms
 Receiver Output lmpedance  50 Ohms
 Maximum Receiver Output Level  100 mV peak-to-peak
 Synthesizer Clock Frequency  80 MHz
 Time Bast Clock Frequency  interna1, External, or Computer
 Maximum Trigger Rate  Greater than 10 kHz
 Internal Trigger Rate  0.l7 Hz to l0 kHz in 20 steps (1, l.7, 2.5, 5 sequence)
 External Trigger In  Positive TTL
 Trigger Out  Positive 5 Volt trigger coherent with start of RF Burst
 Phase Detector Resolution  0.5。
 Phase Detector Monitor Outputs  ± 200mV maximum
 Phase Detector Video Low Pass Filters  50 kHz, l00 kHz, l50 kHz, 250 kHz,
  400 kHz, 800 kHz, l.5 MHz, 2 MHz
 Integrator Gate Delay  0 to 6536 microseconds in 0.l microsecond steps
 Integrator Gate Width  0 to 409.6 microseconds in 0.l microsecond steps
 Gated lntegrator Ranges  2, 8.3, 16, 42, 110, 250, 620 or l600 V/(V∙millisecond)
 Digital interface  32 bit TTL (16 bit lnput, 16 bit Output)
 Data Acquisition Card  ADAC 5632 TTL
 Connector to Digital lnterface  D-37 Connector
 Optional Computer Interface  GPIB (IEEE-488)
 Internal DigitaI-to-Analog Converters
 Resolution
 Output Range
 6
 l2 bits
 0V to 5V typicaI or -2.5V to +2.5V
 Measurement AnaIog-to-Digital Converters
 
Resolution (self-calibrating)
 3
 
16 bits
 Diagnostic Analog-to-Digital Converters
 Multiplexed lnputs
 Resolution
 8
 
1
 8 bits
 ExternaI Analog Inputs (±5 V)  2
 Auxiliary Power Outputs (-l5V, -5V, +5V, +l5V, +48V)   2
 Cabinet Style  19 inch rack mount; side panels provided
 Dimensions  17.5″(44.5 cm) side, 10.5″(26.7 cm) high,
  l7.2″(43.7 cm) deep
 Shipping Weight  Approximately 40 pounds (18kg)
 AC Power Requirements  85 to 240 Volts RMS, 50-60 Hz, ~ 300 VA

 
C. 부속품 (Accessories)
 High Power 50 ohm Termination  1 ea
 High Power Filter/Diplexer at Selected Frequencies  4 ea
 High Power Stepped Attenuators  2 ea
 High Power 6 dB Attenuator  1 ea
 SS-40 Signal Sampler  1 ea
 PAS-0.1-20 High Impedance Broadband Pre-Amp  1 ea
 MS Professional Basic Development system  1 ea
 ADAC 5525 Data Acquisition Card  1 ea
 CCKR Coax Cable Kit  1 kit
 RS-10 Signal Selector  1 ea
 RSD Stepdown Transformer  1 ea